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Electronics and Communication Engineering
Digital Electronics Lab
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Aim
Theory
Pretest
Procedure
Simulation
Posttest
References
Feedback
synchronous up down counter
1.In an UP-counter, each flip-flop is triggered by:
a: The output of the next flip-flop
b: The normal output of the preceding flip-flop
c: The clock pulse of the previous flip-flop
d: The inverted output of the preceding flip-flop
2.In digital logic, a counter is a device which
a: Counts the number of outputs
b: Stores the number of times a particular event or process has occurred
c: Stores the number of times a clock pulse rises and falls
d: None of the Mentioned
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